StarTest™ serves as the ICT/JTAG test support supplier

JTAG External Modules for Cluster Test

The JTAG External Modules JEMIO for Cluster test are intended to provide test access to off-board signals that otherwise could not be accessed by a JTAG test system. For many designs, Boundary-Scan has adequate access to on-board signals, but signals that go off the board often cannot be tested by a JTAG tester. By adding JTAG access to these off-board signals, JEMIO modules can increase the board's JTAG test coverage, possibly reducing the need for implementing another test method or for developing alternative tests to reach the required level of test coverage.

The family JEMIO modules provides a number of sets of JTAG accessible GPIOs or nets that can be used to control and observe signals that go off the board. Each JTAG channel is controlled individually and can be configured as an input, output, I/O or tri-state. The JEMIO scan chain can be combined with the JTAG scan chains of the board being tested so it is included in the infrastructure verification and interconnect tests. Eventually, the JEMIO modules should be used separately or designed into the board or system test fixture. The programming and control of the JTAG test channels during testing is automatically performed by JTAG tools of all vendors mentioned below without any user intervention.

The JEMIO modules provide a flexible and low cost opportunity for JTAG test implementation for the board headers, edge connectors, PCB test points and pads, etc. By the use of JTAG-channels of the internal CPLD, the JEMIO modules provide a number of fully bidirectional test channels for connectivity (interconnect) testing of the circuit elements that would otherwise be un-testable through JTAG test. The JEMIO test setups and one of the JEMIO modules are shown on the figure below.

            We would like to present to our hardware valuable customers a new product — the JEMIO-LVDS module. In the full configuration it provides an effective addition to JEMIO the 36 LVDS input and 36 LVDS output channels as well as 2 TTL IO channels. The module can be configured by the customer's demand. Unused LVDS channels remain to be standard JEMIO TTL IO channels.

We would like to present to our hardware valuable customers a new product — the JEM_MiniPCI-T III module that provides the effective addition to cluster JTAG test MINIPCI nets. The JEM_MiniPCI-T III module provides testing of 83 PCI and reserved channels, 33 VCC and GND lines and also several configured loopback connections. The following types of the JEM_MiniPCI-T I & JEM_MiniPCI-T II are available on demand as well.

JEMIO.1-74 module


JEMIO™ test setup for JTAG boards


JEMIO™ test setup for non-JTAG boards


The JTAG External Modules JEMIO main features are:

  • Performs both interconnect and cluster tests in circuit boards;
  • Supports the wide range of GPIO net sets, including:
Module Name Ordering Part Number
    74 pin JEMIO.1
  148 pin JEMIO.1
  38 pin JEMIO.1-LVDS
  yyy pin JEMIO.6
  xx pin JEMIO.1-UD

Consult StarTest for additional GPIO sets (UDxx means — Upon Demand with xx IOs).

  • Tests for opens on PWR and GND pins of the GPIO sets
  • JTAG controlled GPIO nets for drive and sense
  • Each GPIO pin is independently controlled for sense, drive, bi-directional, and tri-state function
  • Hot Swap: each module may be connected/disconnected between tests without switching power off
  • Equipped with the IEEE 1149.1 (JEMIO.1) and IEEE 1149.6 (JEMIO.6) compatible Test Access Port(s) (TAP)
  • Supplied software contains BSDL file of the module
  • Fully compatible with the following JTAG vendor ATPG and Runner platforms:
  •   Flynn Systems' onTAP Series 4000
  •   Corelis' ScanExpress
  •   JTAG Technologies' ProVision
  •   Asset' ScanWorks
  •   Goepel' CASCON
  •   XJTAG' XJRunner
  • Fully compatible with the JTAG Live – the free circuit board debug tool. You can quickly and very simple drive, sense and sample pins and not complex clusters – it is absolutely FREE indeed!

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