StarTest™ serves as the ICT/JTAG test support supplier

Market Overview

The pool of current and potential StarTest™'s customers is extensive large. All kinds of electronic OEM (Original Equipment Manufacturer) companies, CM (Contract Manufacturer) or EMS (Electronic Manufacturing Service) companies in such fields as:

  • computer industry;
  • telecommunications equipment;
  • consumer products;
  • electro-optical technology;
  • photonics;
  • military electronics;
  • medical electronics;
  • transportation sector;
  • transportation sector;
both in Israel and worldwide are our current or potential customers.

The market for Boundary-Scan (JTAG) test equipment is in the nascent stages right now. Just as ICT emerged and grew to become the dominant testing technology for PCB over the last 30 years, Boundary-Scan testing will most likely replace ICT to become the preferred technology of board production and verification over the next 10 or 20 years.

The market for Boundary-Scan benchtop test equipment is beginning to show signs of significant growth since 2000 by expanding 30% from the previous years in terms of sales revenues. This is the result of several economic and technical factors that are impelling customers to lower costs, expand test coverage and increase manufacturing throughput for a wide range of computer and telecommunications products.

This market is forecast to increase substantially over the next several years. There are powerful and compelling arguments for the growth of Boundary-Scan (JTAG) market. Some of the key drivers for this growth include:

  • Lack of or limited test access to PCBs
  • The need to reduce the number of test node points
  • The need to reduce production test time
  • New PCBs are small and real-estate sensitive with decreased ICT coverage
  • Increasing percentage of digital and specialized ICs (ASICs, FPGAs, etc.)
  • ICs are getting more complex and require internal scan and BIST
  • The explosion of nets on a board driven by ICs with 1,000 to over 2,000 pins
  • The growing importance of board-level Boundary-Scan structures for in-system configuration (ISC) of CPLDs and FPGAs
  • The swing towards BGA device packaging and advanced packages
  • The deployment of Boundary-Scan technology to help solve SOC testability problems
  • The use of Boundary-Scan 1149.1 protocols as a backplane testability bus, opening up Boundary-Scan (JTAG) applications in system integration and field service environments

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