StarTest serves as the ICT/JTAG test support supplier
DISCOVER YOUR BOARD'S HIDDEN TEST POTENTIAL!
JTAG.TECT is our subsidiary for Russian-speaker customers   מבוא בעברית
 

StarTest is founded in January 2003 and is now a leading developer and supplier of the test solutions in Israel on any hardware level, including device, board, and system. StarTest is a dedicated team of test experts and engineers with the summary experience of more than 70 years worldwide.

StarTest serves as the ICT/JTAG test support supplier in the following fields:

  • The Design-For-Testability (DFT) analysis of electronic circuits before layout and in all stages of their lifetime including the check-up of the customer’s design DFT compliance, as well as multi-chain and system level (via backplane) JTAG implementation support.
  • The optimal test strategy selection — whether ICT, JTAG, or both methods together — for the higher test coverage and shorter time-to-market. The test coverage maximization for the mixed JTAG/ICT usage.
  • The ICT program development for the Teradyne Z18xx testers, the test process support on the customer production facility (Flextronics, A.L.Electronics, PCB Technologies, Zicon, SCI Sanmina, etc).
  • The JTAG (Boundary-Scan) test program development, including the on-board programming of CPLD, FPGA, FLASH, I2C, etc., for all the tools of the following vendors:
    • ScanPlus and ScanExpress of Corelis;
    • onTAP of Flynn Systems;
    • ProVision of JTAG Technologies;
    • ScanWorks of Asset InterTech.
  • The full JTAG test process support (installation, test debug and running, failure diagnostics, maintenance, User Guide preparation) performed in the customer’s production facility, as well as in the customer’s laboratory/test facility on-demand.
  • The Boundary-Scan technology and Design-For-Testability (DFT) courses, as well as seminars and training on the customer facility. Help customers with the newest Boundary-Scan standards usage, such as IEEE 1149.4, IEEE 1149.6, IEEE 1149.7, IEEE P1149.8.1, IEEE 1532, IEEE 1500, In-System Configuration IEEE 1532, IJTAG (IEEE P1687).
  • The Design-For-Testability (DFT) Manuals development for private customer usage.
  • The JTAG (Boundary-Scan) vendor benchmarking (features comparison) and the selection consulting for the customer needs.

We're working with a plenty of companies in the following countries:


Israel

USA

Canada

Russia
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StarTest News

12.02.2010
New company logo and new web site release.

Dr. JTAG Monthly Focus

August 8 and November 7, 2010
“Design-For-Testability & Boundary-Scan (JTAG) Technologies» Course No. 369 in the High-Tech College Herzlia, 5 days. The course 369 syllabus.
October 31, 2010
“DFT & JTAG Standards — Digital and Analog” Course No. 368 in the High-Tech College Herzlia, 3 days. The course 368 syllabus.
November 14, 2010
“JTAG Technology & DFT Basics” Course No. 4890 in the High-Tech College Herzlia, 1 day. The course 4890 syllabus.
Flynn Systems debuts HW cluster tools
Flynn Systems has augmented its hardware line with the introduction of the StarTest JEM_DIMM/SODIMM modules family.


 
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